Keysight measured 20 dB return loss at 7 GHz on a microstrip fixture. After in-fixture TRL, the response reached 31 dB without mismatch ripple. [Ref. 1]

The DUT had not changed. The calibration reference plane had.

That distinction becomes critical in mm-Wave RF PCB measurements. It matters across Phased Arrays, Radar, 5G, and Satellite Communications.

A VNA calibration at cable ends does not remove PCB launches. Nor does it remove fixture transmission lines or via transitions.

At microwave frequencies, those structures can dominate the measurement.

The Core Problem: Calibration Plane ≠ DUT Plane

Consider a DUT embedded between two PCB launches. In cascade-matrix form:

TMEAS = TL · TDUT · TR

where:

• TL = left fixture network

• TDUT = actual device

• TR = right fixture network

The desired network is:

TDUT = TL⁻¹ · TMEAS · TR⁻¹

A conventional coaxial SOLT calibration corrects to its coaxial planes. Any PCB structure beyond those planes remains inside the measurement.

Analog Devices explicitly identifies this limitation of coaxial SOLT. [Ref. 2]

Those remaining structures can include:

• SMA or 2.92-mm connector launches

• GCPW transmission lines

• microstrip-to-stripline transitions

• signal vias

• probe pads

• matching transitions

• fixture asymmetry

Their contribution increases as electrical dimensions grow. At mm-Wave, a physically small launch is electrically significant.

Why TRL Is Different

TRL means: Thru – Reflect – Line

The method uses two transmission measurements and reflection standards. These measurements determine the full two-port error coefficients.

Keysight states TRL determines the same 12-term two-port error model as SOLT. [Ref. 3]

The difference lies in the standards. SOLT requires accurately characterised:

• Short

• Open

• Load

• Thru

TRL instead exploits transmission-line physics. Its standards can be fabricated in the DUT's transmission medium. Keysight specifically recommends TRL for fixtures and on-wafer measurements. [Ref. 3]

That means the calibration can move inside the PCB. The connector launch can become part of the calibrated error box. The desired reference plane can approach the actual component terminals.

The Three Standards Carry Different Jobs

THRU

The THRU connects both calibration reference planes. It may be zero-length or non-zero length.

Keysight notes a zero-length THRU avoids THRU loss and impedance uncertainty. Its electrical definition helps establish the calibration reference plane. [Ref. 4]

REFLECT

The REFLECT provides a strong reflection. It can commonly be implemented as an open or short.

Its exact reflection magnitude does not need precise characterization. The same reflection standard must behave consistently at both ports. [Ref. 4]

Its phase must be known sufficiently to choose the correct solution. Keysight specifies the REFLECT phase within approximately one-quarter wavelength.

That is approximately: ±90°.

This relaxed requirement makes TRL practical in planar media.

LINE

The LINE provides the crucial phase separation.

Its characteristic impedance should match the THRU structure. Its propagation constant should also match the THRU medium. [Ref. 5]

The LINE cannot have the same electrical length as THRU. Otherwise, the calibration equations become poorly conditioned. And this produces the first major TRL design challenge.

Pain Point 1: The Wrong LINE Length Can Destroy Calibration Accuracy

The differential phase between THRU and LINE is: Δθ = βΔl

For a quasi-TEM structure: β ≈ 2πf√εeff / c

Therefore:

Δθ ≈ 2πfΔl√εeff / c

Keysight specifies a practical phase difference between: 20° < |Δθ| < 160° [Ref. 5]

As Δθ approaches: 0° or 180°, the standards become difficult to distinguish.

Measurement uncertainty then increases significantly. [Ref. 1]

The optimum condition is approximately:

Δθ = 90°

Keysight recommends quarter-wave differential length near the geometric-mean frequency. This is not simply a layout guideline. It is numerical conditioning of the calibration problem.

Designing a TRL LINE for a 24–30 GHz PCB

Consider a mm-Wave calibration kit covering 24–30 GHz.

Assume; εeff ≈ 3.

The geometric-mean frequency is: fGM = √(24 × 30). Therefore:

fGM ≈ 26.83 GHz

For optimum 90° phase difference: Δl ≈ λg/4

Therefore: Δl ≈ c / (4fGM√εeff)

giving approximately: Δl ≈ 1.61 mm

At 24 GHz: Δθ ≈ 80.5°

At 26.83 GHz: Δθ ≈ 90°

At 30 GHz: Δθ ≈ 100.6°

That is an excellent phase window. It remains comfortably inside the 20°–160° TRL region.

Why One LINE Cannot Cover Unlimited Bandwidth

Because phase scales approximately with frequency Δθ ∝ f, the 20°–160° window gives roughly:

160 / 20 = 8

Therefore, one LINE supports approximately an:

8:1 frequency ratio, under the conventional TRL criterion.

Keysight explicitly states this practical 8:1 limitation. [Ref. 4]

For wider bandwidth, multiple LINE standards are required. Keysight gives 2–26 GHz as an example requiring two lines. [Ref. 5]

This becomes important for broadband RF hardware.

Examples include:

• wideband Radar front ends

• multiband Open RAN radios

• UWB RF switches

• wideband phased-array feed networks

• 24–44 GHz measurement platforms

A single beautifully fabricated LINE may still be mathematically unsuitable.

Multiline TRL Solves a Different Problem

Multiline TRL uses several transmission lines. Different line lengths provide favourable phase separation across frequency.

NIST pioneered multiline TRL for accurate planar measurements. Using multiple lines improves calibration bandwidth and robustness. [Ref. 6]

Anritsu's multiline implementation selects favourable line pairs by frequency. Additional lines can reduce repeatability effects and line-to-line variation. [Ref. 7]

This becomes increasingly valuable above 50 GHz. The physical LINE dimensions become extremely small.

Fabrication tolerance then consumes a larger percentage of Δl.

A 100 GHz Perspective

Assume: εeff = 3.

At 100 GHz, the guided wavelength is approximately: λg ≈ 1.73 mm.

A quarter-wave LINE difference becomes: Δl ≈ 0.433 mm.

Now consider a PCB fabrication error of ±25 µm.

That represents approximately: ±5.8% of the intended differential line length.

The physical dimension looks tiny. Electrically, the percentage error is no longer tiny.

This is why mm-Wave metrology becomes manufacturing metrology.

TRL Is Not an Obsolete Microwave Technique

Recent metrology work demonstrates the opposite.

NIST reported multiline TRL calibration kits characterized to 500 GHz and 1100 GHz. Those kits supported high-accuracy HBT measurements through 325 GHz. [Ref. 8]

NIST also demonstrated interconnect characterization extending to 325 GHz. That work combined multiline TRL with multi-tier de-embedding. Experiment, full-wave simulation, and distributed modelling showed excellent agreement. [Ref. 9]

TRL therefore remains highly relevant to:

• 6G research

• sub-THz hardware

• advanced packaging

• antenna-in-package

• chiplet RF integration

• high-frequency semiconductor characterization

Pain Point 2: The Calibration Reference Impedance May Not Be 50 Ω

This is one of TRL's most overlooked details.

TRL does not inherently know 50 Ω. The LINE establishes the calibration reference impedance.

Keysight states the LINE defines the reference impedance after calibration. [Ref. 1]. That means a nominal 50 Ω PCB line matters enormously.

Suppose manufacturing produces:

ZLINE = 53 Ω

The calibrated result can inherit that reference environment. The VNA display may still look perfectly clean, but the resulting S-parameters may not represent ideal 50 Ω ports.

Why the LINE Impedance Can Move

The realised transmission-line impedance depends on:

• Dk

• dielectric thickness

• trace width

• copper thickness

• copper roughness

• etch geometry

• solder mask

• ground geometry

Your TRL LINE experiences the same fabrication physics as the DUT. That is an advantage, but it is also a source of calibration uncertainty.

A 2% Impedance Error Is Not Automatically Removed

Suppose the intended LINE is 50 Ω, but fabrication creates 51 Ω.

The reflection relative to ideal 50 Ω becomes:

Γ = (51 − 50)/(51 + 50)

Therefore:

|Γ| ≈ 0.0099

Equivalent return loss becomes approximately:

RL ≈ 40.1 dB

That looks excellent. Yet every calibrated DUT is now tied to a slightly shifted reference impedance.

For many components, this may be negligible. For precision mm-Wave metrology, it may not be.

Multiline TRL Can Address This More Rigorously

NIST's multiline TRL framework can determine frequency-dependent line impedance. It can then establish a selected reference impedance, including 50 Ω. [Ref. 6]

This becomes especially important for:

• material characterization

• precision filter extraction

• MMIC modelling

• transistor characterization

• metrology-grade S-parameters

A beautiful calibration without impedance traceability remains incomplete.

2025 Research Shows Why Probe Geometry Also Matters

A 2025 IEEE/ARFTG study investigated multiline TRL to 110 GHz. The researchers examined the influence of RF probe pitch. They emphasized that reliable uncertainty depends on the complete measurement configuration. [Ref. 10]

That configuration includes:

• substrate

• planar transmission line

• RF probe geometry

The work also emphasized single-mode propagation for valid uncertainty assessment. Reported uncertainties used a 95% coverage probability, k = 2.

This is an important modern lesson. At 110 GHz, calibration is no longer only about standards. The probe-launch electromagnetic environment becomes part of metrology.

Pain Point 3: TRL Cannot Correct a Fixture That Changes Between Standards

TRL assumes repeatable error boxes. The THRU, REFLECT, LINE, and DUT must share equivalent transitions. If those transitions differ, calibration cannot perfectly remove them.

Keysight states TRL accuracy depends directly on standard quality and repeatability. Physical discontinuities inside the standards can degrade calibration accuracy. [Ref. 3]

That includes:

• inconsistent connector seating

• different launch geometries

• bends

• via changes

• ground discontinuities

• probe-placement differences

A TRL coupon cannot fix geometry it does not reproduce.

The Launch Must Be Common to Every Standard

Consider four structures:

THRU

LINE

REFLECT

DUT

If each uses a slightly different connector transition: EL,THRU ≠ EL,LINE ≠ EL,DUT, then the common-error-box assumption begins failing.

The calibration mathematically removes one inferred error box. It cannot remove four different physical launches simultaneously. That is why fixture symmetry matters.

The PCB Stack-Up Must Also Be Common

For accurate in-fixture TRL, standards should share:

• laminate lot where practical

• dielectric thickness

• copper construction

• reference planes

• transmission-line geometry

• via configuration

• connector footprint

This is especially critical on Rogers substrates.

A LINE fabricated on another stack-up is not equivalent. Likewise, a coupon located on another panel may experience variation. For high-precision work, calibration design and PCB fabrication become inseparable.

The Famous Keysight Fixture Example Shows the Risk

Keysight measured a nominal 50 Ω microstrip transmission line.

First, calibration was performed at the external coaxial ports. The measured return loss was approximately 20 dB at 7 GHz. The result also contained substantial mismatch ripple. The coax-to-microstrip launch was the dominant reflection. [Ref. 1]

After in-fixture TRL, return loss reached approximately 31 dB through 8 GHz.

The mismatch ripple disappeared. The DUT did not become better. The measurement became more representative.

Translate That Into Reflected Power

At RL = 20 dB, reflected power is: 1%.

At RL = 31 dB, reflected power is approximately: 0.079%.

That is roughly 12.6× lower apparent reflected power. The difference came primarily from removing fixture effects.

That demonstrates why calibration-plane placement matters. A “good-looking” VNA result can still measure the wrong structure.

The Same Problem Can Corrupt S₂₁

Fixture loss adds directly to measured transmission loss.

Suppose:

• Left launch = 0.4 dB

• Right launch = 0.4 dB

• DUT loss = 1.0 dB

A cable-plane measurement gives approximately: S₂₁ ≈ −1.8 dB.

The actual DUT is only: −1.0 dB.

The fixture has created 0.8 dB measurement bias.

For one passive component, that is significant. Across a 256-channel phased array, such an error changes architecture decisions.

Group Delay Is Even More Sensitive

A fixture also adds phase. Its phase may be nonlinear with frequency.

Simple port extension removes linear electrical delay. It does not automatically remove dispersive fixture behaviour.

Keysight's microstrip TRL guidance specifically identifies dispersive delay as problematic for conventional fixture correction. [Ref. 11]

TRL measures standards inside the same propagation medium. That makes it particularly valuable for:

• microstrip

• stripline

• GCPW

• waveguide

Keysight explicitly identifies these dispersive media as TRL applications. [Ref. 1]

Why This Matters for Phased Arrays

Phased arrays depend on differential phase accuracy.

Suppose one RF path appears 5° longer because fixture phase remains embedded.

The calibration table will correct a hardware error that does not exist. Once deployed, the fixture is gone and the resulting beamforming correction becomes wrong.

This can affect:

• beam pointing

• sidelobe levels

• null depth

• axial ratio

• coherent EIRP

For Massive MIMO, measurement-plane discipline becomes calibration discipline.

Why This Matters for Radar

Radar networks often require accurate:

• insertion phase

• group delay

• amplitude balance

• channel isolation

An unnoticed fixture delay can corrupt correlation. It can also mask a real channel imbalance.

For wideband pulses, nonlinear phase becomes especially dangerous. Radar engineers therefore need more than calibrated magnitude. They need calibrated reference planes.

Why This Matters for Satellite Communications

Ka-band SatCom hardware combines:

• filters

• couplers

• phased-array feeds

• LNAs

• PAs

• waveguide transitions

Ground stations often contain several connector transitions before the DUT. LEO payload hardware may integrate components more tightly. In both cases, fixture effects can consume apparent link margin.

An unremoved 0.5 dB fixture loss can look like antenna inefficiency. It can also look like reduced LNA gain.

That affects both EIRP and G/T.

Measurement architecture therefore becomes system architecture.

TRL Does Not Remove Random Error

TRL corrects repeatable systematic effects. It does not eliminate random measurement uncertainty.

Keysight identifies major random errors as instrument noise and connector repeatability. Those errors cannot be removed through calibration. [Ref. 12]

They can only be reduced statistically or operationally. That may require:

• narrower IF bandwidth

• sweep averaging

• higher source power where appropriate

• better connector repeatability

Keysight recommends these techniques for reducing VNA noise errors.

TRL Does Not Freeze Time Either

Calibration drift begins after calibration finishes. Thermal expansion changes cable electrical length. Microwave converter stability can also change.

Keysight identifies temperature as a primary drift mechanism. It recommends recalibration after significant setup changes. Its guidance also recommends recalibration after ambient changes exceeding 3°C. [Ref. 13]

At 77 GHz, several degrees of cable phase drift can matter.

A perfect TRL kit cannot correct a calibration that has drifted.

This Changes the Meaning of “Measured Data”

A technically credible measurement should describe:

• VNA model

• frequency range

• IF bandwidth

• source power

• calibration method

• calibration plane

• standards geometry

• connector or probe configuration

• number of averages

• temperature

• de-embedding method

Without those details, an S-parameter plot lacks metrological context.

This becomes particularly important for benchmark publications. Two laboratories can measure the same DUT differently. The measurement planes may simply be different.

The Strategic Engineering Solution

Top-tier RF organisations design calibration before designing the fixture. They do not add TRL coupons after layout completion.

1. Define the Desired Reference Plane First

Ask: Where do I actually want S₁₁ and S₂₁ measured?

Possible locations include:

• connector edge

• GCPW launch

• component pad

• BGA escape

• antenna-feed port

• MMIC probe pad

Then design calibration standards around that plane. The correct reference plane is a system decision.

2. Design the LINE From the Actual Frequency Band

Use Δθ = βΔl.

Start with 20° < Δθ < 160° and target approximately 90° near the geometric-mean frequency. [Ref. 5]

For broadband measurements, use multiple LINE lengths. Do not stretch one LINE beyond its useful phase window.

3. Fabricate Standards in the Same Electromagnetic Medium

Use the same:

• PCB stack-up

• copper profile

• trace geometry

• reference plane

• surface finish

• via style

Keysight recommends constructing TRL standards in the DUT's media. [Ref. 3]

This is one of TRL's strongest advantages. Use it deliberately.

4. Make the Launches Identical

The connector-to-PCB structure should repeat everywhere. That means identical:

• pad geometry

• ground-via fencing

• antipads

• solder geometry

• mechanical alignment

Do not redesign the launch around each standard. You would be changing the error box.

5. Treat the REFLECT as a Real RF Structure

The REFLECT need not have perfectly known magnitude. But it must be repeatable. Its phase classification must also be correct. [Ref. 4]

For PCB work, a short is often practical. But its via inductance and return path still matter.

At mm-Wave, “short” does not mean zero impedance.

6. Verify LINE Impedance Before Trusting Calibration

Use:

• 2D field solver

• HFSS

• CST Microwave Studio

• TDR

• material coupons

Include realistic:

• Dk

• dielectric thickness

• copper roughness

• etch geometry

Do not assume the fabricated line remains exactly 50 Ω.

Remember, the LINE helps establish the TRL reference impedance.

7. Use Multiline TRL for Broad or Metrology-Grade Work

Multiple LINE lengths improve frequency coverage. They also provide redundancy.

NIST multiline TRL specifically uses multiple lines to improve calibration performance. [Ref. 6]

Modern implementations can also estimate calibration uncertainty.

NIST currently provides software supporting VNA uncertainty propagation. [Ref. 14]

This becomes valuable above mm-Wave frequencies.

8. Validate Calibration With an Independent Structure

Never trust the calibration because the software says “Cal Complete.”

Measure a verification standard. Good candidates include:

• known 50 Ω line

• independent delay line

• Beatty line

• attenuator

• broadband termination

Inspect:

• S₁₁

• S₂₁

• phase

• group delay

• TDR response

A calibration should survive an independent test.

9. Correlate TRL Measurement With Full-Wave Simulation

Build the measured structure in HFSS or CST.

Place simulation ports at the TRL reference planes. Then compare:

S₁₁(f)

S₂₁(f)

∠S₂₁(f)

group delay

If simulation and measurement disagree, do not immediately tune the material model.

First verify the calibration. A wrong measurement plane can imitate a wrong Dk.

TRL and SI/PI Are Connected

At high frequency, the fixture is a distributed electromagnetic network.

Return Paths matter. Via fencing matters. Ground discontinuities matter. Those structures influence the TRL standards too.

A calibration coupon with poor return paths calibrates poorly.

This is where HFSS and SI/PI workflows should converge.

The Altium / Allegro Workflow Should Start Earlier

The TRL kit belongs inside PCB architecture.

Create dedicated controlled structures for:

• THRU

• LINE

• REFLECT

• verification line

Lock their geometries. Prevent automated routing changes. Keep mechanical keep-outs identical.

Treat the calibration kit as measurement hardware.

Not spare coupon space.

The 2026 Metrology Direction Is Clear

Accurate S-parameters remain fundamental to emerging RF hardware.

NIST currently provides traceable S-parameter characterization through 110 GHz. It is developing on-wafer traceability methods extending toward 1 THz. These efforts directly support future 6G and terahertz hardware. [Ref. 15]

TRL and multiline TRL remain central to that measurement ecosystem. Measurement accuracy becomes harder as wavelengths shrink. It does not become less important.

The B2B Procurement Implication

A supplier report stating “Measured on a calibrated VNA” is incomplete.

For advanced RF hardware, procurement should ask:

• Which calibration method?

• Where were the reference planes?

• Was fixture loss removed?

• Were TRL standards on the same stack-up?

• What LINE lengths were used?

• What phase window did they cover?

• Was reference impedance verified?

• Was an independent verification standard measured?

• What uncertainty was reported?

For Phased Arrays, also request:

• calibrated channel phase

• channel-to-channel amplitude

• scan-state repeatability

For Radar, request:

• group-delay accuracy

• phase repeatability

• fixture de-embedding evidence

For Satellite Communications, request:

• feed-network loss

• calibrated gain paths

• uncertainty contribution to EIRP and G/T

At mm-Wave, measurement methodology becomes part of product qualification.

The Executive Takeaway

A VNA can be calibrated correctly. Yet the DUT measurement can still include the fixture.

Keysight demonstrated this directly.

External coaxial calibration produced ≈ 20 dB return loss at 7 GHz. In-fixture TRL exposed approximately 31 dB return loss through 8 GHz. The fixture mismatch ripple also disappeared. [Ref. 1]

For the LINE standard: 20° < Δθ < 160°, remains the practical design window.

Approximately 90° is preferred near the geometric-mean frequency and the LINE itself establishes the calibration reference impedance.

So the correct question is not:

“Did you calibrate the VNA?”

It is:

“Where did you calibrate the electromagnetic reference plane?”

Because at mm-Wave, a clean S₂₁ trace is not proof of a clean DUT.

It may only be proof of a smooth fixture response.